Thursday, December 27, 2007

AT91SAM7S microcontroller and eval board

Recently I came across the AT91SAM7S microcontroller from Atmel (Wikipedia article). It's a very cool gadget and is affordably available at Digikey. Here is Atmel's ad copy:
The AT91SAM7SE512 is a Flash microcontroller with external memory bus based on the 32-bit ARM7TDMI RISC processor. It features 512K bytes of embedded high-speed Flash with sector lock capabilities and a security bit, and 32K bytes of SRAM. The integrated proprietary SAM-BA Boot Assistant enables in-system programming of the embedded Flash. The external bus interface supports SDRAM and static memories including CompactFlash and ECC-enabled NAND Flash.

Its extensive peripheral set includes a USB 2.0 Full Speed Device Port, USARTs, SPI, SSC, TWI and an 8-channel 10-bit ADC. Its Peripheral DMA Controller channels eliminate processor bottlenecks during peripheral-to-memory transfers. Its System Controller manages interrupts, clocks, power, time, debug and reset, significantly reducing the external chip count and minimizing power consumption.

In industrial temperature worst-case conditions, the maximum clock frequency is 48MHz. Typical core supply is 1.8V, I/Os are supplied at 1.8V or 3.3V. An integrated voltage regulator permits single supply at 3.3V. The AT91SAM7SE512 is supplied in a 128-lead LQFP Green Package, or a 144-ball LFBGA Green Package. It is supported by an Evaluation Board and extensive application development tools.

The AT91SAM7SE512 is a general-purpose microcontroller, particularly suited to applications requiring high performance, USB connectivity and extended on- and off-chip memory.
So that's already pretty cool, but even better, there is a great little evaluation board which is also available at Digikey. Software resources abound.

Thursday, December 20, 2007

Other great nanotech (and related) blogs

I guess if I say "other great" nanotech blogs, the implication is that my blog is itself great, but many of these listed are much better than mine. The people doing them put in more work and more thought. Not all of these are relevant to long-term nanotech, but anyway here's the list.
  • Tom Moore's Machine Phase blog -- Tom is now working for Nanorex, and doing a lot of pretty, brilliant nanomachine design work.
  • Damian Allis's Somewhereville blog -- Damian is Nanorex's consulting quantum chemist, and a fascinating guy in general. He doesn't play a scientist on TV, he's an actual real scientist.
  • Gina "Nanogirl" Miller's blog needs no introduction for those who've been around nanotech discussions for a while
  • Blog of the Center for Responsible Nanotechnology
  • Howard Lovy's NanoBot blog
  • Foresight Institute's Nanodot blog
  • Rocky Rawstern's blog
  • A list of nanotech blogs
  • An explanatory website (not a blog per se) by one of the authors of "Nanotechnology for Dummies"
  • A blog about nanocrystals, though I'm not sure what differentiates a nanocrystal from any other crystal
  • The Singularity Institute is primarily about artificial intelligence rather than nanotechnology but there is a lot of common ground.
  • The IEEE has an automation blog about present-day industrial robots.
  • Another present-day robot blog, this one with more of a hobbyist spin.
  • Emeka Okafor's Timbuktu Chronicles blog is not about nanotechnology or robotics, it's about technologies that help and empower people in developing regions of the world. When not blogging, Okafor sometimes plays basketball, unless it's another guy with the same name.

Tuesday, December 11, 2007

The Roadmap Report is published!

The report is now available in PDF format. If you are a Digg subscriber, PLEASE vote up the digg story about it so it reaches the front page. Publicizing the report is a step toward a rational and benign development policy for advanced nanotechnology. I have the privilege of knowing a few of the people who've been involved with the Roadmap project, and they are the kind of people you hope will be involved: very bright, and very ethical.

I haven't gotten far in reading the report yet myself. It's rather thick, in two sections of about 200 pages each. Don't be put off by that, as the language is quite accessible, even in the more technical second half.

Monday, October 22, 2007

Brilliant collection of hobby electronics videos

This is a collection of YouTube videos about different topics in hobby electronics. I've only just discovered this and haven't yet checked out many of the videos, but it's great to see that so many have been posted. It seems to mostly be two guys working for Make Magazine.

Thursday, October 18, 2007

It's a good time to be an electronics hobbyist

OurPCB is a Chinese PCB fab outfit with an initial cost of $57.00 and a subsequent charge of around 15 to 25 cents per square inch for 2-layer boards and 50 to 75 cents per square inch for 4-layer boards. The per-square-inch costs shrink for bigger orders. So PCB fab and assembly is cheap. What do I do with this? Obviously there is a huge opportunity to do something.

PCBs and assembly (even surface mount assembly) are no longer a significant obstacle to complex electronic projects. The next obstacle is that I'm lazy about learning. To some extent that can be addressed by prioritizing what to learn - if USB does all the communication I need, I can ignore PCI.

We could have an electronics hobbyist renaissance as good as the 1970s, starting with a series of articles in Make magazine. O'Reilly would probably love it.

The economics works better for big boards than for small boards. I can envision scalable VLIW array processors spanning several FPGAs, or maybe tightly networked DSPs or GPUs. I like the look of the Analog Devices ADSP-31362. I could review some of the molecular modeling code out there (Amber, CHARMM, Gamess, Gaussian, Gromacs, NAMD) and build an scalable architecture optimized for molecular modeling, large-scale simulations, and other interesting things.

Building a supercomputer, that's so unimaginative. I don't have any interesting problems to feed it. I suppose I could build it and let other hobbyists figure out what problems to throw at it.

Wednesday, October 17, 2007

Some of the code for the board

Much of this code was written by a genius named Wolfgang Wieser, who deserves the Nobel Prize in hobbyist electronics. I've tweaked his code in places.

The firmware is at and the Eagle design files are at

I work in Linux, and the stuff in these tarballs is written to work on a Linux box. To build the firmware you'll need SDCC on your machine. I've built the firmware successfully on Mandriva 2006 and Fedora Core 5. I have had trouble getting it to work on Ubuntu and hope to get that fixed because I'm migrating my home machines to Ubuntu.

Verilog/FPGA tools for Linux

Until I get more organized with this, it's just a collection of random links. I'll need to figure out a way to program the FPGA on my board.Go to the Xilinx web page for downloading WebPACK and grab a free download. It's a shell script; run it to install the Xilinx tools on your hard disk. It will take about a gigabyte so make sure to install it in a partition with that much room. Start reading doc/usenglish/books/docs/qst/qst.pdf. That's as far as I've gotten today.

Good Verilog tutorial here.

More about the board -- progress stalled, hoping to pick it up again

Periodically people email me and ask how things are going with my SDR board. Things are quite thoroughly stalled. I can program the FX2 over the USB cable, and I can wiggle the I/O pins, and I've connected the I/O pins to the FPGA's JTAG programming pins. Theoretically it should be pretty easy to program the FPGA after that. But that's where it is stalled; for some reason the FPGA won't program correctly. Go figure.

One thought is to make up a board with a lot more testpoints, like this.

This design is for a temporary two-layer board that I would use only to get the design and development effort back on track. Once I'd resolved the FPGA programming issues, I'd go back to a four-layer design with a lot fewer testpoints.

But if you're one of those impatient folks who wants to play with a software-defined radio RIGHT NOW then you should check out these links, many of which describe projects that are much further along than my board.

The software-defined radio board (an old post)

Two years after my first attempt, I am working on a new board for software-defined radio. In the past, I pursued this as a political agenda, but that made me rush, and ultimately design a crummy board that didn't work. I've split the design into two pieces and this board is the first piece. It has an 8-bit processor with USB slave capability, and it has a Xilinx XC3S400 FPGA with 400K gates, lots of on-chip RAM, and 16 hardware multipliers, each 18-bit by 18-bit. The USB channel can get data to or from your laptop at over 50 megabytes per second. The board has 46 general purpose I/O pins and six dedicated pins. Not counting assembly, which you can do cheaply at home, the board costs about $70, so it's a pretty good deal for a hobbyist.

The second piece of the radio is a board with fast digital-to-analog and analog-to-digital converters, to translate the signals between the digital domain and the world of radio electronics. A receiver would use an ADC, a transmitter would use a DAC. I'd like to design a receiver board first, but I want to get the USB/FPGA board up and running before that.

If you had this thing connected to your laptop, you'd install GNU Radio and you could transmit and receive radio signals. Depending on the analog hardware you had, you could do this on any of several radio bands, and with the USB bandwidth and a fast ADC, you could pull in whole television signals, maybe even HDTV signals. And that's when things get interesting politically, because that's the battleground for fighting the Broadcast Flag battle.

The USB/FPGA board is a remarkable example of what a low-budget electronics hobbyist can do these days. A couple years ago I spent some money on a license for CadSoft Eagle to do four-layer boards but I expect it to fill my hobbyist needs for a long time. Now I can send my Gerber files to PCB fab outfits in China like this one and get boards for ridiculously low prices. As a result, my electronics projects cost very little more than the price of the parts. It's cool, and it calls for a renaissance of electronics hobby activity. To us oldtimers it seemed like the 1970s was the peak for that kind of thing, but it can come back stronger than ever.

Monday, October 01, 2007

Things are a little different for Ubuntu

On an Ubuntu box I needed to change my 1xEVDO files. Now /etc/ppp/peers/1xevdo look like this.
connect-delay 10000
lcp-echo-failure 4
lcp-echo-interval 65535
connect '/usr/sbin/chat -v -t3 -f /etc/ppp/peers/1xevdo_chat'
And /etc/ppp/peers/1xevdo_chat looks like this.
SAY 'Starting CDMA modem script\n'
'' 'ATZ'
'OK' 'ATE0V1'
That seems to do the trick. This stuff was cribbed from an article at It seems to work a good bit better, actually, so I should probably try this on the FC5 box as well.

Friday, September 28, 2007

Verizon phone as cellular modem

In a week or two I will be traveling. There will probably be Verizon coverage but there won't be conventional internet access. So I picked up a USB data cable for my LG VX8300 and added Verizon's BroadbandAccess connectivity to my account for a month. I'm a big Linux snob, so I needed to dig around for relevant Linux info. I found everything I needed on KA9Q's web page on the subject.

On Fedora Core 5, I needed to set up three files:
  • /etc/ppp/peers/1xevdo
  • /etc/ppp/peers/1xevdo_chat
  • /etc/ppp/pap-secrets
  • /etc/resolv.conf # use known-good nameservers
and then run
pppd call 1xevdo
as root. Within a few seconds, you should see a valid IP address when you type
ifconfig ppp0
and you're online. It's the coolest thing. Considerably slower than the wireless service at Starbucks or Panera but it's a lot better than no connectivity at all.

Tuesday, September 11, 2007

The Roadmap conference is coming up

A couple years ago, Foresight, Battelle, the Society of Manufacturing Engineers and a few other organizations put together a project called the Technology Roadmap for Productive Nanosystems. The idea was to figure out the steps that would lead us to a world of safe and mature nanotechnology. I know some of the people involved in this effort. They've had meetings to which I've not been invited, which is appropriate because they have important work to do, and they don't want the distraction of answering questions from the idly curious.

Their work has percolated along for about two years (that I've been aware of, probably more time before that) and finally there will be a conference where they will tell the world what they've been up to. As luck would have it, I have a schedule conflict and will be unable to attend, but there will be a CDROM of the presentations and I hope to ask around and see if I can get a copy.

I have high hopes for the work these people have done. This is a well-organized effort by a lot of very smart people with a wide range of relevant expertise.

The Center for Responsible Nanotechnology website discusses the societal risk of multiple competing nanotechnology development efforts:
The existence of multiple programs to develop molecular manufacturing greatly increases some of the risks listed above. Each program provides a separate opportunity for the technology to be stolen or otherwise released from restriction. Each nation with an independent program is potentially a separate player in a nanotech arms race. The reduced opportunity for control may make restrictions harder to enforce, but this may lead to greater efforts to impose harsher restrictions. Reduced control also makes it less likely that a non-disruptive economic solution can develop.
A unified effort like the Technology Roadmap initiative represents a safeguard against these very realistic concerns.

Tuesday, August 21, 2007

Software-defined radio board: Stalled, for now

Periodically people email me and ask how things are going with my SDR board. Things are quite thoroughly stalled. I can program the FX2 over the USB cable, and I can wiggle the I/O pins, and I've connected the I/O pins to the FPGA's JTAG programming pins. Theoretically it should be pretty easy to program the FPGA after that. But that's where it is stalled; for some reason the FPGA won't program correctly. Go figure.

One thought is to make up a board with a lot more testpoints, like this.
I had a picture of a board design here before, but I think I've since misplaced that file. I'll try to remember to check around for it.
This design is for a temporary two-layer board that I would use only to get the design and development effort back on track. Once I'd resolved the FPGA programming issues, I'd go back to a four-layer design with a lot fewer testpoints.

But if you're one of those impatient folks who wants to play with a software-defined radio RIGHT NOW then you should check out these links, many of which describe projects that are much further along than my board.

Monday, July 02, 2007

Linear least square error estimation

Let z be some unknown function of x and y. Assume the function is close to linear, so we want a function
    f(x,y) = a x + b y + c
that approximates z by minimizing the total square error for a collection of N data points (xi, yi, zi). We will need to accumulate the following sums. This can be done incrementally in real time, if the data arrive that way. We can use exponentially weighted sums to give more importance to more recent data points, if that makes sense.
Sx = ∑ xi
Sy = ∑i yi
Sz = ∑i zi
Sxx = ∑i xi2
Syy = ∑i yi2
Sxy = ∑i xiyi
Syz = ∑i yizi
N = ∑i 1 (or with exponential weighting if desired)
Then we have a total square error:
    E = ∑i (zi - axi - byi -c)2
and we want to minimize that error by choosing (a,b,c) at a minimum:
    ∂E/∂a = ∂E/∂b = ∂E/∂c = 0

0 = Sxz - a Sxx - b Sxy - c Sx
0 = Syz - a Sxy - b Syy - c Sy
0 = Sz - a Sx - b Sy - cN
Then we can obtain (a,b,c) from linear algebra.
[ a ]    [ Sxx Sxy Sx ]-1  [ Sxz ]
[ b ] = [ Sxy Syy Sy ] [ Syz ]
[ c ] [ Sx Sxy N ] [ Sz ]
Based on all this, we can write a linear least-squares estimator class in Python.

Recent tech talk at Google: Aubrey de Grey

This is a Google Tech Talk by Aubrey de Grey, who has studied gerontology at Cambridge University. He has thought about ageing as a problem with an engineering solution. He has charted the course of the solution in broad strokes, and put together a credible plan to make good progress over the coming decades, with ideas about which science to pursue and how much money would be needed.

My health is good but not stellar and like many Americans, I'm overweight. I ordinarily assume that as my 50th birthday fast approaches, I've got 25 or 30 years left. That's how I try to plan my finances and other aspects of my life.

In this talk de Grey presents what he calls conservative estimates of what would be possible if we were to pursue his research program. If he's right, I've got a good shot at not just a few more decades of life, but perhaps a few more centuries, conceivably a lot more centuries.

I fear death as much as any normal person. Perhaps if I had more time, more youth, more energy, I could make some more important contribution to humanity than I've made. Certainly I have the selfish wish to have more freedom, travel more, make more money, play with more toys, read more books, have more sex, all that stuff.

Thursday, June 28, 2007

Aubrey de Grey's tech talk at Google

This is one of those brilliant things like Cory Doctorow's writing that gives you REAL HOPE that the future will be a good and happy place, and that you might have a chance of making it to that point. Aubrey de Grey has been studying gerontology (the science of ageing) at Cambridge University and he proposes that with some science and engineering smarts, we can make huge progress toward extended lifetimes in the time left to even old farts like me (not quite 50 yet).

As I think about the benefits that I personally would like to get from nanotechnology, I think life extension is a big thing. Of course we'll have ever more powerful computers and capable robots and flying cars and all those nifty toys, and they'll all be very inexpensive, but I really want a lot more time to enjoy everything. And as my parents get older, I'd love to be able to offer that to them as well, though even by de Grey's very optimistic estimates, they're too old to benefit much.

Saturday, May 19, 2007

Social policy bonds

Two earlier posts (one on DRM, the other on amortizing development cost) deal with cases where today's free market does a poor job of compensating somebody for something of value. I think these are what economists might call "missing market" problems -- it's not that a free market couldn't work in this situation, it's simply that we don't have the right market mechanisms in place yet.

One more approach to the missing market problem is the social policy bond, invented by New Zealand economist Ronnie Horesh. It works a bit like the X Prize or the Methuselah Mouse Prize, in that when something good is accomplished, somebody gets money. But with the X Prize, all the money goes to the winner (in that case Burt Rutan, who won the prize in 2004 flying SpaceShipOne), and none goes to the runners-up, or to the subcontractors who helped the winner win. The incentives in a one-winner prize therefore punish anybody who doesn't win.

Social policy bonds spread the winning money more fairly. Everybody who puts in time or money can get something back. In Horesh's vision it works like this. A deep-pocketed government announces that attaining some goal is a desirable social good. Tax money is put aside to bring about that goal in an economically efficient way. The government prints bonds which are redeemable for some large-ish amount of money when the goal is accomplished, and sells those bonds at a lower price to anybody who wants to buy them. The free market does the rest -- compensations will arrange themselves so that people work toward bringing about the goal, so that they can collect on the redemption of their bonds. People who would be potential prize winners (if the government were using a prize) can use the bonds as loan collateral to pay subcontractors.

This strikes me as a brilliant idea, although Horesh recognizes a potential free-rider problem with the scheme. When social policy bonds have been used in real life a few times, we'll have a better idea how big a problem that will be.

I like the idea that a social policy bond could be issued not by a government, but by an individual or private organization. There are two potential problems. One, an individual can't command the huge sums of money that a government can, so it might take thousands or millions of people each issuing privately-backed bonds to make something happen. Two, the issuer of a bond needs to have people believe that he/she/it will make good on the redemption, and there isn't an obvious mechanism how an individual can do this. Maybe there is some trustworthhy organization (like a bank? or Lloyd's of London?) that could hold the money in escrow. I've discussed the notion of privately-backed social policy bonds with Horesh in email, and he feels these two problems are prohibitive, but I still think it's worth a shot.

Monday, May 07, 2007

Anonymous e-cash

I once interviewed at a place called NTRU Cryptosystems. They have a very fast public key algorithm suitable for implementation in slow, memory-limited embedded systems. One of the interesting aspects of their algorithm is that creating public/private key pairs is a very quick operation. If you've used PGP or GPG, you've probably noticed that with traditional RSA, the key generation process is annoyingly slow. Recalling that cryptography's version of a person's identity is a private key, this made me think about what might be possible if key generation were a very inexpensive operation, and what you get is a kind of anonymity that could make electronic cash work really well. But you don't really need fast key generation. You can set up your home computer to generate many key pairs overnight, and save them all on a USB flash drive for use the following day.

How do you get from plentiful key pairs to anonymity? You start a bank that accepts public keys as proofs of identity, and therefore associates accounts with public keys. The bank does not ask a client for any identification other than a public key. The bank allows the money to be withdrawn by any party who can prove ownership of the public key by using the corresponding private key to sign documents, which signatures the bank can verify using the public key. The bank will transfer the money to the ownership of a different public key, given a digitally signed transfer request from the original holder. The transfer document could be presented in email, which could be routed through any number of anonymous remailers.

If I wish to transfer anonymously, I can send the bank a series of emails transferring the money from one identity to another, each identity represented by one of the key pairs I generated last night. Going through several anonymous identities provides plausible deniability that I still have the money.

All it takes to create such a bank is to set up a database that associates public keys with cash balances, and a website that performs redemptions and transfers as discussed above. One would want to locate the bank in a country or region with a favorable tax and regulatory climate.

Thursday, May 03, 2007

6.432, one of my favorite MIT courses

MIT has put the materials for 6.432 online. This is a BRILLIANT course. It covers the application of Bayes' theorem to a wide variety of problems in engineering and communication. It explains a lot of the math behind radar, and those wierd noises that modems make. I really want to say more about this but presently I don't have the time to do justice to just how cool this stuff is.

Hmm, as I quickly review the notes they've posted, it looks like they didn't actually put up the real contents of the course. I've started assembling some notes in a user page on Wikipedia, and I hope they will eventually address the pieces that are missing.